Design and Analysis of RTOs based Reconfigurable Cots Design on FPGA

Background: Due to greater potential to accelerate a wide variety of application, reconfigurable FPGA has become a subject to great deal of research. The FPGA has ability to perform computations in hardware to increase the system performance, while retaining much of the flexibility of software solutions. In recent development, the real-time embedded system are increasingly being built with COTS components namely mass-produced peripherals and by reducing cost through buses and performance improvement. But the available COTS systems do not guarantee any timeliness and do not implement any priority scheduling mechanism. Methods/Statistical Analysis: This article deals with a new approach to create an RTOS based reconfigurable COTS design for FPGA platform. Thereby RTOS kernel is designed for FPGA and COTS system designed on the FPGA. Application/Improvements: At runtime, the hardware tasks are scheduled and allocated system resources like I/O, memory, etc. to successfully export multiple virtual devices for a single physical device.