An Ising model mapping to solve rectangle packing problem
2018
Floorplanning of modules has been a significant role in VLSI design automation and it can be formulated as the "Rectangle Packing Problem." Ising model-based computers (or annealing machines) are the type of a non-von Neumann computer and recently expected to solve combinatorial optimization problems efficiently. In this paper, we propose a mapping of "Rectangle Packing Problem" for solving it by the annealing machines. In our proposed mapping, a sequence-pair is represented on an Ising model. Our proposed approach maps a "Rectangle Packing Problem" with N rectangles onto a 3N 3 -spin logical Ising model. Experimental results demonstrate that through the proposed approach we can solve the problem with 18 rectangles at the maximum on a fully-connected annealing machine and the problem with three rectangles at the maximum on 20k-spin CMOS annealing machine.
Keywords:
- Packing problems
- Computer science
- Electronic engineering
- Floorplan
- Combinatorial optimization
- Mathematical optimization
- Very-large-scale integration
- Rectangle
- Spin-½
- Ising model
- Electronic design automation
- rectangle packing
- CMOS
- Computational science
- combinatorial optimization problem
- Semiconductor device modeling
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