Modeling the equivalent oxide thickness of Surrounding Gate SOI devices with high-κ insulators

Abstract In this work, the behavior of the gate insulator capacitance of different Surrounding Gate SOI devices with square and circular cross-sections has been studied. It is shown that the equivalent oxide thickness used for planar devices is not valid for devices with bidimensional confinement. For this kind of devices, new expressions for the gate insulator capacitance and equivalent oxide thickness are obtained using an approximate model of metal–insulator–metal capacitors. These expressions depend not only on the dielectric constant but also on the geometry of the device under consideration since for non-planar devices geometry plays an important role in the behavior of the C – V characteristics. The new expressions are validated by numerical simulations of these Multiple-Gate (MuG) devices that take into account quantum effects.