A Low Frequency PWM Based Multilevel DC-Link Inverter with Cascaded Sources

This paper presents a novel Cascaded Sources Multilevel DC Link (CSMLDCL) configuration to an H-bridge inverter, which effectively reduces the number of components to achieve a preferred voltage level. The CSMLDCL topology provides a dc output voltage with the shape of a staircase approximating the rectified shape of a desired sinusoidal wave. A set of area equalization based low frequency Pulse Width Modulation (PWM) techniques suitable for multi-level inverters is suggested. The objective of the new switching strategies is to lower the Total Harmonic Distortion (THD) apart from minimizing the switching losses. Simulation and experimental results of a seven-level inverter are included to illustrate the operating principle and highlight the merits of the proposed strategy.