Low Frequency Ring Oscillator and Its Use in Non Overlapping Clock Generation

Switched capacitor (SC) techniques have become the default standard for implementing mixed signal blocks in CMOS technologies. Non-overlapping clock (NOC) generator is a key building block for SC circuits, traditionally implemented using inverter chains. For moderate and high frequencies, the numbers of inverter stages are nominal. But for low frequency applications, like biomedical signal processing, the numbers of inverters increase significantly affecting the area and power budget of the design. In this work, three new inverter cells are proposed for realizing low frequency ring oscillator. They exhibit a delay larger than other popular implementation techniques. Simulation results show that low frequency oscillations can be achieved with much lesser number of transistors and with lower power dissipation. The proposed inverter is then used to realize a voltage controlled NOC generator whose non-overlap period can be modulated. Alternate digital multiplexing technique is also presented to control the non-overlap period.