Comparator Design using CTL and Outputwired based Majority Gate

In this paper, majority gate based 1bit and 2 bit comparator is proposed for 130 nm channel length. First CTL and output wired based majority gate is designed and then that majority gate is used for designing comparator. Two of the important parameters for CMOS circuit are its transistor count and delay. The power dissipated by the proposed comparator circuits is less than the conventional design for comparators. Comparators have been designed using the CMOS based majority gate that combines the advantages of both the technologies. The simulations have been done using tanner tool.