Old Web
English
Sign In
Acemap
>
Paper
>
A Novel Wire-activity-aware Floorplanner for 3D-stacked Processor
A Novel Wire-activity-aware Floorplanner for 3D-stacked Processor
2013
Irie Hidetsugu
Houchi Hiroyoshi
Inaba Tomohiro
Majima Kazuki
Fujiwara Daisuke
Yoshimi Masato
Yoshinaga Tsutomu
Keywords:
Parallel computing
Mathematics
Discrete mathematics
Computer architecture
Topology
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]