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Acemap > Paper > 具易測試及除錯特性之智慧型低功率多核心系統之設計技術研發：從電子系統層級至矽晶片層級-總計畫暨子計畫八：多核心系統之低功耗測試及除錯( III )

具易測試及除錯特性之智慧型低功率多核心系統之設計技術研發：從電子系統層級至矽晶片層級-總計畫暨子計畫八：多核心系統之低功耗測試及除錯( III )

2012 
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