TPM 8.6: A 6.5ns 1Mb BiCMOS ECL SRAM

ted scheme l. Figure I is a partial block diagram of the column decoder including the redundant circuits. When a defective array is detected, poly silicon fuses F in the decode lines and in the switch circuits are blown by laser. As a result, NVIOS and PMOS transisto rs in the switch circuits turn on and the select signal is transferred into the redundant