All-digital pulse width control circuit

The invention provides an all-digital pulse width control circuit, which comprises a pulse generator, a signal synthesis unit, a delay control unit and a matching delay unit which are connected between the pulse generator and the signal synthesis unit, wherein the delay control unit delays a reference signal which is input into the pulse generator and outputs a delayed signal to the signal synthesis unit; and the matching delay unit compensates for the delay which is generated in the delay control unit and outputs the compensation result to the signal synthesis unit. The delay control unit comprises a coarse delay unit, a cycle detection unit, a first selector and a refined delay unit. Compared with the current all-digital pulse width control circuit, the all-digital pulse width control circuit provided by the invention has the advantages that: the input signal period is detected by the cycle detection unit; and the delay required by the expected duty ratio is obtained by calculation to adjust DL once and for all, so that the duty ratio of the output signal quickly reaches the expected value.