ESD Protection Diodes in Bulk Si Gate-All-Around Vertically Stacked Horizontal Nanowire Technology
2019
For sub-5 nm bulk Si CMOS, a gate-all-around (GAA) nanowire (NW) device is a promising candidate. The new device architecture will have an impact on the transient performance of an electrostatic discharge protection diode. The 100 ns transmission line pulse (TLP) and 2 ns very fast TLP measurement results and TCAD simulations prove that the performance in bulk GAA NW-based diodes is maintained in comparison to bulk FinFET diodes.
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