SRAM (static random access memory) structure containing writing operation time sequence tracking unit

2013 
The invention discloses an SRAM (static random access memory) structure containing a writing operation time sequence tracking unit. The SRAM structure comprises a global time sequence control unit, wherein the global time sequence control unit is connected with a writing tracking control circuit and a character decoding drive circuit; the writing tracking control circuit is connected with a writing time sequence tracking unit through two bit lines TBL and TBLB of the writing time sequence tracking unit, the global time sequence control unit is connected with an input/output module and a bit line selecting module, and the input/output module is connected with a storage array module through the bit line selecting module. The SRAM structure provided by the invention has the advantages that the tracking unit is used for simulating the data write-in process of a storage unit to generate a time sequence control signal, and the accurate time sequence control of an SRAM data write-in route is realized.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    0
    References
    0
    Citations
    NaN
    KQI
    []