Implementation of a New Orthogonal Shuffled Block Transform for Image Coding Applications

This paper presents the implementation of a novel transform technique for two dimensional coding. The hardware is composed of six blocks, of which only three are distinct. The “butterfly” block is the main engine of the transformer and is multiplier free. The matrix transposer block is a novel structure minimizing the number of registers and the interconnections. The third distinct block is a parallel to serial converter designed using the register allocation technique. Layouts for the whole circuit have been drawn and simulations using technology parameters have been carried out to prove the functionality of the transformer.