A 65nm CMOS pulse-width-controlled driver with 8V pp output voltage for switch-mode RF PAs up to 3.6GHz

State-of-the-art wireless communication radios are implemented in deep-submi-cron CMOS, including the RF power amplifiers (PAs). However, in wireless infrastructure systems, the RF PA is often realized in an LDMOS or a compound technology to obtain the required large output powers. For next-generation reconfigurable infrastructure systems, the switch-mode PAs (SMPA) seem to offer the required flexibility for multiband multimode transmitters. In order to interface the high-power devices of the SMPA with the digital CMOS blocks of the transmitter, a wideband RF CMOS driver capable to generate high voltage (HV) swings is required. In this way, digital signal processing can be directly applied to control the required input pulse shapes of the SMPA.