Surface mobility in silicon at large operating temperature

An experimental investigation on high-temperature carrier mobility in silicon inversion layers is carried out with the aim of improving our understanding of carrier transport at the onset of second breakdown. Special MOSFET structures suitable for Hall measurements were designed and manufactured using the BCD-3 technology available at ST-Microelectronics. Hall measurements were carried out using a special measurement setup that allows operating temperatures in excess of 400/spl deg/C to be reached within the polar expansions of a commercial magnet. A novel extraction methodology allowing for the determination of the Hall factor and the carrier mobility against impurity concentration and lattice temperature was devised. Finally, a compact mobility model suitable for implementation in device simulators has been worked out, implemented in the DESSIS/sup /spl copy// code and validated within an industrial environment.