A chargepump with enhanced current matching and reduced clock-feedthrough in wireless sensor nodes

Today, most of the locating systems are based on phase-locked loop (PLL) architectures for synthesizers. The synthesizer as a key element for location accuracy needs a chargepump with an exact current matching for improved phase noise performance. Especially in indoor scenarios, where sensor nodes must reach a precision below a few centimeters, the fidelity of the synthesizer system is important. This paper addresses the design of a chargepump with enhanced current matching and reduced clock-feedthrough in a FMCW based sensor node. The difference between a conventional chargepump design and the enhanced design is presented and compared to show the current matching improvement and clock-feedthrough reduction. The different designs were manufactured in a 0.13µm CMOS process by IBM. They are running in a PLL with 128 MHz reference frequency and have an output current of 100µA with a total power consumption of 1mW for the chargepump with phase-frequency detector (PFD).