Selection of Well Contact Densities for Latchup-Immune Minimal-Area ICs

Heavy ion data for custom SRAMs fabricated in a 45-nm CMOS technology demonstrate the effects of N- and P-well contact densities on single-event latchup. Although scaling has improved latchup robustness, process-level immunity has not been achieved, indicating a continued need for latchup mitigation techniques. A simple, algorithmic approach for selecting N- and P-well contact densities is described that ensures latchup immunity while minimizing the area penalty.