Flow control for onboard solid state recorder

This work deals with the hardware implementation of the Consultative Committee for Space Data Systems File Delivery Protocol, using Consultative Committee for Space Data Systems Packet Service and Telemetry/Telecommand framing schemes, which is less software intensive, to replace highly CPU intensive architectures for reliable space communication. A low latency, low area, intelligent programmable hardware has been presented here which can accomplish reliable data transfer up to ∼380 Mbps. The hardware protocol stack implementation is compared against the Telecommunications protocol processing subsystem using Reconfigurable Interoperable Gate Arrays (TRIGA) [1] implementation. The results of our experiments show that the implementation on Actel ProAsic3E FPGA, takes lesser area and offers higher automation in hardware.