Mobility and CMOS devices/circuits on sub-10nm [110] ultra thin body SOI

For the first time, we show the experimental inversion mobility data on ultra thin [110] SOI substrates for thickness as thin as 6nm. Both electron and hole mobility in ultra thin [110] SOI are evaluated as a function of SOI thickness. In addition, novel processes such as [110] selective epitaxy and extremely thin cobalt disilicide CoSi/sub 2/ are developed. Ring oscillators and SRAM cell are demonstrated for the first time on 6nm [110] ultra thin SOI. When compared to ultra thin SOI in (100) substrate, we observe /spl sim/33% drive current enhancement in PFETs at Lg=50nm and /spl sim/1.8X hole mobility enhancement.