Non thermally-activated transients and buffer traps in GaN transistors with p-type gate: A new method for extracting the activation energy

Abstract This paper demonstrates that conventional drain current transient (DCT) measurements fail at identifying the correct activation energy of buffer defects in transistors with p-GaN gate. Based on combined pulsed and transient characterization, we demonstrate that (i) under off-state stress, the analysed devices suffer from moderate dynamic-Ron and from positive shift in the threshold voltage; (ii) the de-trapping kinetics, analysed by DCT, are unexpectedly not thermally-activated; (iii) de-trapping kinetics are significantly accelerated when measured at high gate voltage; (iv) we report a power law correlation between the gate leakage measured during the de-trapping phase and the time constant for recovery. Finally, (v) we propose a new characterization procedure, based on TLM structures, to overcome these issues, thus accurately investigating buffer-related effects.