Implementation of vision-assisted path planning system for bulk die sorting in semiconductor industry

Semiconductor integrated circuits (IC) are found in all of today’s electronic devices. Low cost mass production has enabled electronics to revolutionize the way people live and work. One major operation in IC assembly is die sorting, where individual die is categorized by grade. The traditional vision-assisted pick-and-place die sorting approach has high accuracy but low throughput. In this research, a bulk die sorting approach through vision-assisted path planning is studied and implemented. The objective of this system is to provide accurate die classification through vision processing and high die sorting throughput with efficient path planning. The system hardware consists of two parts, motion XY-stage used for wafer planar translation and optical unit used for acquiring wafer images. Firstly, the wafer image is acquired using the image mosaicing method. Then, die classification is performed to obtain the positions of functional and non-functional dies. Subsequently, point and coverage path planning algorithms are applied to determine the optimum path for physical die sorting operation. Overall, the proposed system showed significant improvement in the wafer image quality, low mismatch of dies, and obtained the shortest traversal time and distance for clustering dies by using the combined heuristic cluster with nearest neighbour algorithm. The system showed that the best coverage path planning method is the back-and-forth filling using decelerate-reaccelerate motion in terms of processing time (1.6 s), traversal time (137.2 s) and XY-stage stresses. As a conclusion, through the integrated implementation of hardware and software encompassing wafer image acquisition, die classification and path planning, the die sorting system is capable of achieving accurate die sorting with high throughput.