GaN-on-Si blue/white LEDs： epitaxy, chip, and package

The dream of epitaxially integrating III-nitride semiconductors on large diameter silicon is being fulfilled through the joint R&D efforts of academia and industry, which is driven by the great potential of Ga N-onsilicon technology in improving the efficiency yet at a much reduced manufacturing cost for solid state lighting and power electronics. It is very challenging to grow high quality Ga N on Si substrates because of the huge mismatch in the coefficient of thermal expansion(CTE) and the large mismatch in lattice constant between Ga N and silicon, often causing a micro-crack network and a high density of threading dislocations(TDs) in the Ga N film.Al-composition graded Al Ga N/Al N buffer layers have been utilized to not only build up a compressive strain during the high temperature growth for compensating the tensile stress generated during the cool down, but also filter out the TDs to achieve crack-free high-quality n-Ga N film on Si substrates, with an X-ray rocking curve linewidth below 300 arcsec for both(0002) and(10N12) diffractions. Upon the Ga N-on-Si templates, prior to the deposition of p-Al Ga N and p-Ga N layers, high quality In Ga N/Ga N multiple quantum wells(MQWs) are overgrown with well-engineered V-defects intentionally incorporated to shield the TDs as non-radiative recombination centers and to enhance the hole injection into the MQWs through the via-like structures. The as-grown Ga N-on-Si LED wafers are processed into vertical structure thin film LED chips with a reflective p-electrode and the N-face surface roughened after the removal of the epitaxial Si(111) substrates, to enhance the light extraction efficiency. We have commercialized Ga N-on-Si LEDs with an average efficacy of 150–160 lm/W for 1mm~2 LED chips at an injection current of 350 m A, which have passed the 10000-h LM80 reliability test. The as-produced Ga N-on-Si LEDs featured with a single-side uniform emission and a nearly Lambertian distribution can adopt the wafer-level phosphor coating procedure, and are suitable fo