Programming software-managed memory hierarchies

The past decade has seen an emergence of processors which deviate from traditional cache-based architectures by making use of software-managed on-chip local memories to stage data transfers. Examples are the ClearSpeed CSX600, the Sony/Toshiba/IBM Cell processor, and the Storm-1 family from Stream Processors Inc. These processors have demonstrated impressive gains in both raw performance and also performance per Watt over conventional cache-based architectures. Programming such processors has proven challenging, however, with current programming systems exhibiting a variety of shortcomings in expressiveness, extensibility, and portability. This thesis presents a portable, high-level language targeting this range of machines along with the associated compiler technology which permits such a high-level abstraction to attain performance levels on par with hand-coding. Further, low-level language support is introduced which, for the first time, overcomes the expressiveness and extensibility limitations of current languages to support the implementation of type-safe abstract data types, classes, and libraries on these platforms.