Memory cell and a nonvolatile semiconductor memory device

2014 
A while improving the breakdown voltage in the peripheral memory gate electrode, the charge on a portion other than the charge accumulation layer to provide a memory cell and a nonvolatile semiconductor memory device to prevent operation trouble caused by accumulated. A and between the memory gate electrode MG and the first selection gate electrode DG, the memory gate electrode MG and the second selection gate electrode SG between a separating manner sidewall spacers 28a and within 28b nitride sidewall layer in 32a, and 32b formed respectively, as compared with the case of forming by simply insulating oxide film an the sidewall spacers 28a and other sidewall spacers 28b, improving the breakdown voltage in the peripheral memory gate electrode MG. The charge storage layer EC nitride sidewall layer 32a than, 32b and away from the memory well MW, due to injection of charges from the memory well MW in the charge storage layer EC, nitrided sidewall layer 32a, a charge to 32b is hardly injected, charge at a location other than the charge storage layer EC to prevent malfunction to be accumulated. .FIELD 1
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