3D-VLSI Design Tool

In this paper we present a tool for 3d-integrated circuit technology. The fashion of decreasing feature size and increasing chip dimension has increased the concern of increased interconnect delay and high power-budgets in the design. Adequate design tools are not available which incorporate 3D design capabilities like design rule checking, timing analysis and netlist extraction. We have extended M-Edit, a Layout Editor to incorporate 3D design and verification capabilities. It also features capabilities to perform thermal simulation, layout-vs-schematic checking, and 3D parasitic extraction.