"chip-size" antennas for implantable sensors and smart dust

2005 
In this paper, we present the analysis, design and experimental results of /spl lambda//4-patch antennas operating at /spl sim/10 GHz. The ground plane has been adjusted to the patch area in order to drastically reduce the antenna size. Several geometries are presented, with HFSS simulation results. Impedance matching calculations for maximum power transfer between the antenna and the rectifying circuit is also presented. For a 4/spl times/5/spl times/1.6 mm/sup 3/ rectangular antenna fabricated on an RT/Duroid 5880 PCB, the measured maximum gain is 0.75 dB/sub i/ at 10.3 GHz.
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