Hybrid Localized SOI/bulk technology for low power system-on-chip

This paper highlights the successful co-integration of Localized Silicon-On-Insulator (LSOI) devices and of bulk-Si I/O devices on the same chip. LSOI devices present good logic performances and very low mismatch values down to 1.2mV/µm. In addition, we show the backbiasing impact on LSOI SRAM bit-cells for stability improvement. This work also presents the co-integration of LSOI with bulk devices as a solution for the devices that are not compatible with thin-body technology. In particular, we demonstrate for the first time competitive bulk co-integrated ElectroStatic Discharge (ESD) protections.