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HSTL IO Standard Based Energy Efficient FIR Filter Design on 28nm FPGA
HSTL IO Standard Based Energy Efficient FIR Filter Design on 28nm FPGA
2015
Shivani Madhok
Navdeep Singh
Jasleen Kaur
Khyati Nanda
Sweety Dabas
Minal Dhankar
Keywords:
Field-programmable gate array
Efficient energy use
Finite impulse response
Computer hardware
Computer science
fir filter design
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