Old Web
English
Sign In
Acemap
>
Paper
>
Design of Low Power Gain-Cell eDRAM for 4Kb Memory Array in 130nm CMOS.
Design of Low Power Gain-Cell eDRAM for 4Kb Memory Array in 130nm CMOS.
2021
Shi Rong Soo
Afiq Hamzah
N. Ezaila Alias
Izam Kamisian
Michael Loong Peng Tan
Suhaila Isaak
Zaharah Johari
Keywords:
Power gain
Electronic engineering
CMOS
eDRAM
memory array
Computer science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]