A logic circuit and a semiconductor device
2010
In the logic circuit clock gating is performed, the reservoir is reduced by a power failure or suppressed. The logic circuit includes a transistor, wherein the period of the clock signal is not supplied, when between the source terminal and the drain terminal there is a potential difference, the transistor is in an off state. Forming a channel region of the transistor is formed using an oxide semiconductor, the oxide semiconductor, the hydrogen concentration is reduced. Specifically, the hydrogen concentration, the oxide semiconductor is 5 × 1019 (atoms / cm3) or less. Thus, it is possible to reduce the leakage current of the transistor. As a result, the logic circuit, and to reduce failure to suppress power can be achieved with the reservoir.
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