Design and Testing of an 8-Bit Current DAC in 180-nm CMOS Technology

This paper presents an 8-bit current DAC in 180-nm CMOS technology. The circuit is designed and simulated in Cadence Virtuoso software and then processed and measured. The measurement results are presented in this paper and compared to simulation results. The 8-bit current DAC can be used to compensate variations in the parameters of circuit components caused by production. The simulation and measurement results of the differential and integral nonlinearities for each input code of the digital to analog converter in all operating conditions are presented.