Chip packaging structure and the manufacturing method

2012 
The present invention is a packaging structure and to a method of manufacturing a chip. Chip packaging structure comprising: a first chip, a second chip, and an adapter member. A first die having a first plurality of pads, the first pad formed on the surface of the first chip; a second chip having a plurality of second pads, the second pad formed on the surface of the second chip, the first chip and the second chip side by side, and the second chip is electrically connected to the first chip; transfer member disposed on the upper surface of the first chip, and electrically connected to the first chip. Accordingly, the chip package structure can have a smaller size.
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