Chip processing method and apparatus

The present invention discloses a chip processing method and apparatus. The method comprises: dividing a processed area into multiple storage modules with a same capacity; and performing a processing operation on each of the storage modules simultaneously in a unit of blocks, wherein the processing operation comprises a write operation and/or an erase operation. The method and apparatus provided by the embodiments of the present invention solve the problem that the chip processing method affects the speed of the chip in the prior art.