30-GHz Co-designed Low-Noise Amplifier and Antenna-on-Chip for Wireless Applications

This paper presents a 30-GHz co-design of a 28-dB high-gain low-noise amplifier (LNA) and a 54% high-efficiency monopole antenna-on-chip for 5G wireless applications. The LNA design is based on a two-stage differential cascode structure with inductive degeneration. The antenna design is a modified monopole structure to maximize the radiation efficiency. Both parts are integrated directly on the same silicon chip in a 0.25 µm SiGe BiCMOS technology. A co-design method is proposed according to various considerations and a compact matching network is implemented to achieve the optimal power and noise matching. The measurement results show a total gain of 27 dB of the complete system.