A testing device for the CMS silicon tracker front end driver cards

A 9U 400mm VME FED Tester card (FT) has been designed for evaluation and production testing of the CMS silicon microstrip tracker Front End Driver (FED). The FT is designed to simulate both the tracker analogue optical signals and the trigger digital signals required by a FED. Each FT can drive up to 24 FED optical input channels. The internal logic of the FT is based on large FPGAs which employ fast digital logic, digital clock managers and memories. Test patterns and real tracker data can be loaded via VME to the memories. DACs operating at 40MHz convert the data to analogue form and drive the on-board CMS tracker Analogue-Opto-Hybrids (AOH) to convert the data to analogue optical format. Hence, they are identical to the signals produced by the CMS tracker. The FT either transmits the clock and trigger information directly to a FED or to the CMS Trigger and Timing Control (TTC) system. Four such cards will be used to fully test a FED. One FT prototype has been manufactured and is currently being used to evaluate the CMS tracker FED. This paper describes the FED Tester design and architecture.