Crosstalk Measurement Technique for CMOS ICs

Signal integrity is of primary concern for designs in submicron processes. Based on the characterization of an industrial driver library in terms of crosstalk-induced noise possibility [1], we present a specific test structure to measure crosstalk signal on interconnect lines. An original implementation is proposed for direct amplitude and pulse width measurement of the crosstalk-induced parasitic signal. A validation is given with an HSPICE simulation of the extracted layout of the structure implemented in a 0.25µm process.