Nanoelectronics and More‐than‐Moore at IMEC

This paper presents an overview of imec's R&D addressing the challenges of CMOS scaling towards the 10 nm node and its outlook beyond. In addition to the relentless geometrical shrinks, opportunities to further increase nanoelectronic system functionality and performance by co‐integration and chip stacking technologies combined with emerging MEMS and optoelectronic technologies will be presented.