Comprehensive Analysis of Data-Retention and Endurance Trade-Off of 40nm TaOx-based ReRAM.

Multiple write techniques to improve reliability of 40nm TaOx-based resistive random access memory (ReRAM) are presented. A direct reliability trade-off exists between Set/Reset endurance cycle (endurance) and acceptable data-retention time (lifetime). To achieve both endurance and lifetime, various write techniques such as “Verify”, “Finalize_Verify” and “Relaxation effect” has been previously proposed [1]–[3]. This paper investigates the optimal combination of these techniques for the long-term data-retention. As a result, data-retention lifetime increases by 413x at low endurance cycles and 84x at high endurance cycles. To explain such lifetime enhancement, the physical model based on oxygen vacancy (V o ), sdiffusion is discussed. In addition, this paper proposes the effective data modulation technique to suppress endurance-stress by using Asymmetric Coding (AC).