A 300-MHz 16-b 0.5-/spl mu/m BiCMOS digital signal processor core LSI

1994 
A 300-MHz 16-b fixed-point digital signal processor (DSP) core LSI has been developed for video signal processing. In order to achieve high performance, the DSP core LSI employs a parallel processing architecture, 300-MHz redundant binary arithmetic units, and a sophisticated high-performance electrical design. The DSP core LSI, which was fabricated with 0.5-/spl mu/m BICMOS and triple-level-metallization technology, has a 3.9 mm/spl times/4.6 mm area, and contains about 57K transistors. It consumes 2 W at a 300-MHz clock frequency with a 3.3-V power supply. Measured clock skew and critical path delay are less than 80 ps and 2.6 ns, respectively. >
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