Simulation on TSV Protrusion from Atomic to Micron Scales

Data-centric computing including data analytics, machine learning and AI is the main driving force for high-end performance 3D microelectronic packaging. TSV -based technology has enabled the Foveros 3D packaging from Intel, the 3D system integration SoIC from TSMC, and the Xtacking from YMTC. However, thermally induced protrusion of TSV still remains a reliability challenge and the routine finite-element based thermo-mechanical modeling and analysis can only find its limitations as variation in materials and packaging is becoming a much bigger and complex problem as process nodes pushed towards 3/2 nm nodes and beyond. While the simulation results from the previous PFC studies have shed some light on the atomic scale mechanisms underlying protrusion, further information regarding the distribution of internal stress and strain accompanying the atomic scale microstructural evolution and plastic deformation in deep-trench TSV s is missing. In addition, the sizes of the simulated TSVs are in the order of a few nanometers in diameter. It is necessary, therefore, to further extend the capability of the PFC model and make it capable of modeling TSV s and interconnects with dimensions covering the whole spectrum from atomic scale to nanoscale, and from nanoscale to micron scale. This paper aims to simulate TSV protrusion from atomic to micron scales using the recently developed APFC models and derive the strain and stress distributions in the TSV s accompanying the microstructural evolution. It is significantly important to obtain such data to assist the further understanding on the cross-scale mechanisms of TSV protrusion and the consequences of its variations on the functionality and reliability of individual devices, and even the integrated systems at the current and future more advanced process nodes.