A method of manufacturing a p-type lightly doped drain regions

The present invention discloses a method of manufacturing a P-type lightly doped drain region, the manufacturing process used in high voltage integrated circuit, the method comprising: forming a first photoresist layer on a first surface of the high voltage integrated circuit semifinished product; The on the first and second regions of said surface of the first voltage integrated circuit semifinished first photoresist layer removed; a first ion implantation to the first semifinished product surface high-voltage integrated circuits, to obtain a second high voltage integrated circuit semifinished the P-type lightly doped drain region, and the low threshold voltage of the PMOS and high voltage PMOS asymmetric adjusted for forming the first ion.