La-doped metal/high-K nMOSFET for sub-32nm HP and LSTP application

This paper presents results on nMOSFETs with the La-doped high-k/metal gate stack to see its suitability for sub-32nm LSTP and HP applications. The 32nm gate length transistors exhibit an excellent I on -I off characteristic, and the PBTI results meet the 32nm technology node requirement. Furthermore, for the first time, V t variation in the La-doped high-k/metal gate stack devices is investigated. The results suggest that employing the metal electrode suppresses V t variability while no additional parameter fluctuations due to La-doping of the high-k dielectric were observed.