Parallel processing of layout data with selective data distribution

With the increase in layout data (GDSII) size due to finer geometries and resolution enhancement techniques such as Optical Proximity Correction (OPC) and Phase Shift Mask (PSM), layout data is proving to be too voluminous to process by single CPU machines. Post-layout tools have now moved towards distributed computing techniques to process this data more efficiently in terms of speed. Typical distributed computing architectures involve distributing the layout data to various workstations and then each workstation processing its part of the data in parallel. This approach will work well provided the amount of data that is to be distributed is not too large. As the size of the layout data is increasing significantly, the time taken to transfer the layout data between the workstations is turning out to be a major bottleneck. This bottleneck gets further highlighted because the time taken for actual operations gets almost linearly scaled down through employing higher number of workstations in the distributed computing environment and also because the clock speed of the workstations get continuously improved. The focus of this paper is on a smart way of distributing the layout data so that the amount of redundant data transfer is significantly reduced. This is achieved by selective data distribution wherein the layout data is fragmented and each workstation is provided with minimal and sufficient layout information for it to determine the actual fragments required for its processing.