Terminal password device based on system on chip (SoC)

The invention discloses a terminal password device based on a system on chip (SoC). The terminal password device comprises the SoC integrated with a CK520CPU chip, a password chip, a usb2.0 chip, a 10M/100M Ethernet interface chip, a universal asynchronous receiver/transmitter (UART) chip and a serial peripheral interface (SPI) chip, wherein data communication or control between a general purpose input/output (GPIO) control interface and an external low-speed I/O of the chip is supported; due to an SPI, data communication between a nonvolatile memory of an external SPI and external SPI equipment is supported; a UART interface supports an asynchronous communication interface; a USB2.0 host interface supports full-speed and high-speed transmission and hangup remote awakening functions; a memory expansion interface supports external memory storage expansion; and a 10M/100M Ethernet interface supports a carrier sense multiple access (CSMA)/compact disc (CD) protocol of the institute of electrical and electronic engineer 802.3 (IEEE802.3) and an IEEE802.3 multi-access control (MAC) layer protocol of pause operation for fluid control. The terminal password device is small in size, low in power consumption, low in cost and high in economical property.