Simple embedded NVM cell for PMIC applications
2012
An embedded non-volatile memory cell solution with a top-floating-gate structure for power management integrated circuit applications is presented. The cell is fabricated by high-voltage CMOS process (20 V) with low-voltage CMOS devices (5 V) and a PIP capacitor, without additional processing steps or extra photomasks. The fabricated cell shows stable endurance characteristics up to 103 cycles. The charge retention at 85°C is less than 0.5 V after 103 cycles stress.
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