Design and Implementation of Pseudo-Random Sequence Generator Based on Logistic Chaotic System and m-Sequence Using FPGA

Based on logistic chaotic system combined with m-sequence, a pseudo-random sequence generator is implemented on FPGA (Field-Programmable Gate Array) using DSP Builder design technology. The NIST (National Institute of Standard and Technology) standard called statistical test suite for random and pseudo-random number generators is used to test the pseudo-random sequence generated the generator. The results show that the sequence of the system has good random characteristics and can be applied to the actual stream key encryption system.