Method for manufacturing via holes in array substrate

The invention discloses a method for manufacturing via holes in an array substrate. The method comprises steps as follows: the prefabrication array substrate is coated with a layer of photoresist, the photoresist layer is processed to form a first via hole region and a second via hole region, the photoresist in the first via hole region is removed completely, and the photoresist in the second via hole region is partially removed; dry etching is performed for the first time, so that a first via hole with a certain depth is formed in the first via hole region; the photoresist is ashed, and remaining photoresist in the second via hole region is removed; dry etching is performed for the second time, and a second via hole etched to a designated position is formed in the second via hole region. The method can effectively prevent vertical line breaking, and further reduces contact resistance between the via holes and a metal layer as a result of increase of the contact area of the via holes and the molybdenum metal layer, thereby contributing to shortening of response time of a liquid crystal displayer and improvement of the quality of a product.