8-mW, 1-V, 100-Msps, 6-bit A/D converter using a transconductance latched comparator

2000 
A very low-power, high-speed flash A/D converter front-end composed of a new transconductance latched comparator was developed. We established a butterfly sorting technique to guarantee the monotonicity of the converter. The 6-bit A/D front-end achieves a speed of 100 Msps and dynamic range of 33 dB with power consumption of only 7 mW at 1 V and the butterfly sorter guarantees 6-bit monotonicity with an extra power consumption of 1 mW.
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