A DC-10GHz linear-in-dB attenuator in 0.13 /spl mu/m CMOS technology

A CMOS attenuator has been designed and fabricated in a commercial 0.13 /spl mu/m CMOS process. Two /spl Pi/ stages are cascaded to achieve more than 35 dB of maximum attenuation over a frequency range of DC to 10 GHz. Minimum insertion loss varies from 0.8 dB at DC to 3 dB at 10 GHz and remains less than 2 dB in the frequency band of DC-4 GHz. Attenuation is achieved with a control voltage that varies from 0 V to 1.2 V and it is linear-in-dB with respect to the control voltage. A DC feedback loop is implemented to achieve input and output impedance matching over the frequency of interest.