DIGITAL HEARING AID

Hearing aid features, requested by audiologists on the basis of past experiences in clinical practice and research, are in excess of those provided by any aid to date. While this gap cannot be bridged by using existing analog components, digital signal processing (DSP) techniques may be incorporated; however, the power budget of a multi-channel, ear-level, battery-operated hearing aid cannot accommodate the power drain of current general purpose digital signal processors. A two chip design is proposed wherein one chip is responsible for data acquisition and reconstruction while a second chip is dedicated to the DSP circuitry. A custom digital signal processor, potentially capable of performing over 3 million multiply accumulate operations per second while consuming less than a fraction of a milliwatt, required to implement a four-channel hearing aid is presented in this paper. Power consumption is minimized while maintaining a wide dynamic range through the use of sigdlogarithm arithmetic.